Quantum Transport Simulations of a Proposed Logic-In-Memory Device Based on a Bipolar Magnetic Semiconductor

To overcome the memory wall based on the von Neumann architecture, in-memory computing has been intensively studied as a potential solution. Recently, an alternative type of spintronic material, namely, bipolar magnetic semiconductors (BMSs), has attracted much attention because of its opposite spin-polarized valence and conduction bands, which have thus facilitated electrically tunable spin transport. Here, we propose a logic-in-memory device with a traditional field-effect-transistor (FET) configuration by making use of the ferromagnetic and semiconducting features of BMSs simultaneously. Two representative BMSs (2H-${\mathrm{VS}}_{2}$ and semihydrogenated graphene) are selected as the FET channels, and the transport properties of these devices are investigated by using ab initio quantum transport simulations. The spin polarization of the current reaches up to 98%, enabling the device to provide an ideal spin-polarization signal. The distinct electronic structures under the two magnetic states and the electrically tunable spin polarization allow the devices to perform logic operations directly in situ. Two-input logic, including xor and nonvolatile and or nor, can be realized with one and two BMS FETs, respectively, efficiently decreasing the integration density of logic circuits. This work provides an alternative route to realize fused storage and computing functions in a transistor.