现场可编程门阵列
计算机科学
数字信号处理
互连性
FIFO(计算和电子)
图像处理
数字图像处理
计算机硬件
嵌入式系统
组分(热力学)
并行处理
计算机体系结构
信号处理
图像(数学)
人工智能
物理
热力学
作者
Aziz Oukaira,Ali Karime,Vincent Roberge,Mohammed Tarbouchi
标识
DOI:10.1109/iceccme57830.2023.10252728
摘要
This paper introduces a parallel architecture designed for real-time image processing applications, utilizing a combination of digital signal processor (DSP) and field-programmable gate array (FPGA) components for optimal performance. The FPGA component features a first in, first out (FIFO) interconnection network and a specialized data communication protocol that enables effective interconnectivity between three DSPs (TMS320C6414). The performance metrics of the experimental prototype were impressive, as it exhibited both data, by leveraging its efficient image processing capabilities, the system achieves a harmonious balance in parallel processing.
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