A Loop Delay Estimation Algorithm Based on Sliding Window in Digital Predistortion Systems

With the development of communication technology, the linearity of power amplifiers has become an important indicator of the modern communication systems, and digital predistortion (DPD) techniques have emerged in this context. When there is a delay between the output signal and the input signal, the performance of a DPD system is significantly reduced. To address the shortcomings of the widely used loop delay estimation algorithms, an integer loop delay algorithm based on sliding window and a fractional loop delay algorithm using cubic spline interpolation are proposed. The simulation results show that the algorithms not only have low complexity and good accuracy, but also exclude the problems of signal fading and noise interference, which makes them widely applicable to DPD systems.