比较器
量子点细胞自动机
容错
计算机科学
CMOS芯片
数字电子学
细胞自动机
电子工程
晶体管
电子线路
电气工程
工程类
算法
电压
分布式计算
摘要
Summary Quantum‐dot cellular automata (QCA) is a transistor‐free technique for designing digital circuits. It is a substitute for CMOS technology for producing low‐energy and high‐speed digital circuits. In addition, the digital comparator is an important digital circuit; its fault‐tolerant design is examined in this article. Additionally, a coplanar QCA‐based fault‐tolerant comparator circuit with a small number of cells is suggested. The QCADesigner is used to achieve exact simulation results. The suggested fault‐tolerant comparator requires 63 QCA cells, uses 0.8 m 2 , and has three clock cycles delay in accomplishing its purpose. Furthermore, simulation results demonstrate that the suggested comparator design with a limited number of cells can achieve a fault‐tolerant of 80% against cell missing, extra cell, cell displacement, and cell rotation faults.
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