材料科学
电容器
电介质
光电子学
沟槽
电容
复合材料
电气工程
电子工程
介电损耗
作者
Zhiqiao Ye,Ruijie Zhan,Xuesong Quan,Yuhang Dou,Rongbin Xu,Daquan Yu
出处
期刊:
日期:2026-08-01
卷期号:: 1-4
标识
DOI:10.1109/icept71373.2026.11690148
摘要
With the development of advanced interconnect technologies, such as 2.5D/3D packaging, through-silicon via (TSV), and redistribution layer (RDL), the impact of parasitic parameters in power delivery paths on system power integrity has become increasingly significant. Conventional off-chip discrete decoupling capacitors fail to meet the stringent low-impedance requirements of high-frequency packaging systems. In this work, silicon-based three-dimensional deep trench capacitors (DTCs) with an Al2O3-HfO2-Al2O3(AHA) dielectric stack were investigated. The AHA stacked dielectric and electrode films were fabricated by atomic layer deposition and integrated into high-aspect-ratio trench structures (26:1), achieving a high capacitance density of 706 nF/mm2and a breakdown voltage of approximately 3.1 V. In addition, it was found that by annealing AHA multilayer dielectric structure, the leakage of devices was reduced by about one order of magnitude, reaching ≤ 10−7A/cm2at 1 V, which demonstrates the potential of AHA dielectrics for high-performance embedded decoupling capacitors. The results indicate that AHA-based DTCs provide a good balance among high capacitance density, low leakage current, and good breakdown performance, making them promising for embedded decoupling applications in advanced packaging interconnects.
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