Design of Low‐Power DRAM Cell Using Advanced FET Architectures

This chapter includes the design and analysis of Dynamic Random-Access Memory (DRAM) cells with a focus on the comparison of the different technologies such as Carbon-Nano-tube FET (CNTFET), FinFET and TFET that are suitable for low-power, high-performance memory design. The structure of 1T-DRAM (MOS) is shown. CNTFET has more advantages when compared to MOSFET; CNT can replace MOS due to the fact that high-performance CNT can handle high voltages. Compared to MOSFET devices, FinFET devices gives better results. FinFET consists of the double gate and it is called a multi-gate device. TFET is a PIN diode device which consists of heavily doped p and n regions with intrinsic semiconductor material is placed between p and n regions. When the gate voltage reaches to threshold voltages conduction takes place in a particular manner the electrons flow between the source and drain through a tunnel.