噪声系数
低噪声放大器
CMOS芯片
跨导
PMOS逻辑
功勋
带宽(计算)
电子工程
电气工程
晶体管
可变增益放大器
放大器
计算机科学
工程类
光电子学
材料科学
电信
运算放大器
电压
作者
Nallagatla Roopika,M Moheth,Sure Vinod,P. Sanjana,Karthigha Balamurugan
标识
DOI:10.1109/icacc-202152719.2021.9708219
摘要
Recent advancements in semiconductor technologies supports high data rate communications in V-band. Particularly 60 GHz encourages short range multi Gbps transmission suitable for multimedia applications. The first block of the receiver, Low Noise Amplifier (LNA) should have high gain requirements simultaneously maintaining low noise Figure (NF). This work consists of designing Variable Gain (VG) LNAs over the desired bandwidth (57–64) GHz in the V – Band. Variable loads formed by active devices are used to change body transconductance of amplifying transistor. It is found that better tuning range of 19.23 dB/V is achieved with lower noise Figure of 1. 4SSdB for PMOS variable load LNA. Almost 3.57 GHz bandwidth is achieved with figure-of-the-merit (FOM) of >S in all LNAs.
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