低压差调节器
跌落电压
NMOS逻辑
电阻器
PMOS逻辑
电气工程
线路调节
电压
电容器
晶体管
CMOS芯片
分压器
电压调节器
工艺角
电压基准
过驱动电压
物理
工程类
作者
Jiaqi Yin,Shanzhou Huang,Quanzhen Duan,Yaping Cheng
标识
DOI:10.1109/iccds.2017.8120473
摘要
A low-dropout regulator (LDO) with 800 mA load current with wide range input voltage is designed and proposed in this paper. The designed LDO includes two cascaded LDOs. The first one uses a p-type of DMOS power transistor to convert a wide input voltage (3.9 to 20 V) to a stable output voltage of 3 V, which provides a supply voltage for other circuits. The second LDO is designed to achieve a large load current by utilizing a high current driving capability of NPN power transistor. To achieve a high slewing rate, both PMOS and NMOS input-pair amplifiers with a push-pull output stage are adopted. Through the Kelvin connection of external resistors, the output voltage can be adjusted to a different value. The typical output voltage is 2.5 V in this study, and the simulation results show that the designed LDO has good transient response. The measurements demonstrate the output voltage of 2.5 V is stable with a 15μF output capacitor when an input voltage from 3.9 V to 20 V is applied. With a full output load range from 0 to 800 mA, the proposed LDO obtains a line regulation of 0.5093 mV/V and a load regulation of 0.046 mV/mA. The total active chip size is approximately 1.42 mm 2 with 20V/0.25μm CMOS process.
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