InGaAs Tunneling Field-Effect-Transistors With Atomic-Layer-Deposited Gate Oxides

In _0.7 Ga _0.3 As tunneling field-effect-transistors (TFETs) using the p ⁺ (6 nm)/undoped (6 nm) tunneling junction with 5-nm HfO ₂ gate oxides have been demonstrated with an on-current of 50 μA/μm and a minimum subthreshold swing (SS) of 86 mV/dec. The impacts of tunneling junction structures on TFETs' performance have been investigated. It has been found that In _0.7 Ga _0.3 As TFETs with the p ⁺ (4 nm)/undoped (8 nm) tunneling junction provide ~ 80% higher on -currents than In _0.7 Ga _0.3 As TFETs with the p ⁺ (6 nm)/undoped (6 nm) junction, and In _0.7 Ga _0.3 As TFETs exhibit much higher on-currents than In _0.53 Ga _0.47 As TFETs. Different atomic-layer-deposited gate oxides have been used, and Al ₂ O ₃ /HfO ₂ bilayer gate oxides effectively improve the SS compared with HfO ₂ single gate oxide. The effects of equivalent oxide thickness scaling and operating temperatures on the on-current, the SS, and the gate-bias-dependent Esaki diode behavior have been also investigated.