Application of Symmetric Offset Voltage Compensated Sense Amplifier in DRAM

Aiming at the offset voltage problem of sense amplifier in dynamic random access memory (DRAM) caused by transistor threshold voltage mismatch, this paper proposes a symmetrical offset voltage compensated sense amplifier (SOCSA), which achieves efficient suppression of bilateral offset voltage by integrating flip point self-calibration and current mirror dynamic adjustment technology. A five-stage workflow is adopted in the design, power consumption is reduced by time-sharing power control, and a pre-amplification mechanism is introduced to improve the sensing margin in low voltage scenarios. The simulation results based on TSMC 16nm process show that the offset voltage standard deviation of SOCSA is 4.53mV at 25℃ and TT process corner, which is 50.43% lower than that of traditional offset voltage cancelling sense amplifier (OCSA), 32.38% lower than that of reference bit line voltage boosted sense amplifier (BRV-SA) and 28.77% lower than that of calibrated offset voltage sense amplifier (OMCSA), respectively. In terms of dynamic power consumption, SOCSA is 83.2fJ/cycle, which is 35.8% lower than OCSA, and the single-sided self-calibrated sense amplifier (SSSA) is 47.68% lower. In the temperature range of -10℃ to 100℃, the SOCSA offset voltage fluctuates by only 1.52mV, and its stability is significantly better than that of traditional solutions. At a low voltage of 0.95V, the accuracy of SOCSA reaches 92%, which is 28.67%, 5.14% and 10.84% higher than OCSA, BRV-SA and OMCSA respectively. This design provides a low-offset, high-stability sense amplifier solution for 3D DRAM and storage-computing integrated architecture.