2D Amorphous GaOX Gate Dielectric for β-Ga2O3 Metal-Insulator-Semiconductor Field-Effect Transistors

Beta gallium oxide (β-Ga 2 O 3 ) is an n-type ultra-wide bandgap semiconductor material with a reported bandgap from 4.5 eV to 4.9 eV. β-Ga 2 O 3 is a frontrunner in the research for next-generation power devices owing to its numerous merits including the wide range of donor doping concentrations, large bandgap, high theroretical value of critical electric field (~8 MV/cm) leading to substantial Baliga’s figure of merit of ~1900, and the low production cost for crystalline wafers. The last is enabled by the commercial development of several bulk growth techniques, namely, melt growth methods including Czochralski and edge-defined film-fed growth, and epitaxial growth. The metal-insulator-semiconductor field-effect transistor (MISFETs) is the most widely used device structure since it often requires less complicated fabrication process and offers better device scaling and faster switching speed than their counterparts such as junction field-effect transistors or bipolar junction transistors. Various dielectric materials, such as silicon dioxide, hafnium oxide, and aluminium oxide, have been explored for incorporation into β-Ga 2 O 3 MISFETs. However, many of the dielectrics require high-temperature and/or high-vacuum processes during fabrication. Recent studies have reported on the self-limiting formation of native oxide film on the surface of liquid gallium at room temperature and the application of the oxide film as a passivation or a dielectric layer in a nano-scale device. In this study, two-dimensional (2D) amorphous gallium oxide (a-Ga 2 O 3 ) film is fabricated through the liquid gallium squeezing technique and is integrated with a β-Ga 2 O 3 field-effect transistor (FET) to demonstrate an a-Ga 2 O 3 /β-Ga 2 O 3 MISFET. In this work, β-Ga 2 O 3 nano-flakes were obtained through mechanical exfoliation and were dry-transferred onto Si/SiO 2 substrates. Electron-beam lithography and electron-beam evaporation were performed to define and deposit Ti/Au electrodes, respectively, where rapid thermal annealing was performed afterward to form Ohmic source and drain contacts. Polypropylene carbonate (PPC) solution was spin-coated and baked on a polydimethylsiloxane (PDMS) film, placed on a glass slide for mechanical support, to form a uniform PPC layer on the PDMS film. A liquid gallium droplet was placed on the PPC/PDMS film and was squeezed with a cleaned glass slide to form a uniform 2D a-Ga 2 O 3 layer. The fabricated a-Ga 2 O 3 layer was dry-transferred onto a β-Ga 2 O 3 FET during which temperature of 90 °C was applied to the sample chuck to completely release the PPC layer with the a-Ga 2 O 3 layer from the PDMS layer. The resulting a-Ga 2 O 3 /β-Ga 2 O 3 FET was submerged in acetone to remove the PPC layer. The above dry-transfer process of the a-Ga 2 O 3 layer was conducted twice to form double-layered a-Ga 2 O 3 on the β-Ga 2 O 3 FET, before performing electron-beam lithography and electron-beam evaporation to respectively define and deposit the Ni/Au top-gate electrode. The electrical properties of the fabricated device is characterized as a Ni/a-Ga 2 O 3 /β-Ga 2 O 3 heterojunction and an a-Ga 2 O 3 /β-Ga 2 O 3 MISFET at temperatures of 25 °C, 150 °C, and 250 °C. The Ni/a-Ga 2 O 3 /β-Ga 2 O 3 heterojunction of the device shows a clear rectification characteristic with a wider operating voltage compared to those of standard Ni/β-Ga 2 O 3 devices in literatures. The double-layered a-Ga 2 O 3 The a-Ga 2 O 3 /β-Ga 2 O 3 MISFET exhibits normally-on n-type conductivity with stable operation at temperatures from 25 °C to 250 °C, where the obtained on/off current ratio and mobility range from 5.3×10 8 to 4.8×10 7 and 4.7 cm 2 /V·s to 6.9 cm 2 /V·s, respectively. The subthreshold swing and the threshold voltage of the a-Ga 2 O 3 /β-Ga 2 O 3 MISFET showed increases and negative shifts at higher temperatures, respectively. This work demonstrates the facile fabrication process of the a-Ga 2 O 3 /β-Ga 2 O 3 MISFET and its high-temperature stability through the integration of the 2D amorphous Ga 2 O 3 gate dielectrics with a β-Ga 2 O 3 semiconductor.