锁相环
相位噪声
压控振荡器
全球导航卫星系统应用
宽带
分频器
CMOS芯片
PLL多位
电气工程
电子工程
计算机科学
通带
噪音(视频)
工程类
电信
带通滤波器
电压
全球定位系统
图像(数学)
人工智能
作者
Jiahao Zhao,Xuansheng Ji,Han Su,Ziwei Wang,Woogeun Rhee,Zhihua Wang
标识
DOI:10.1109/icta56932.2022.9963015
摘要
A 0.7-2.5GHz NB-IoT/GNSS/BLE hybrid PLL with a single D/VCO is implemented in 28nm CMOS. With careful frequency planning, the PA pulling effect is mitigated by using a multi-mode divider chain. A divider-by-2.5 relaxes the tuning range requirement of the D/VCO and mitigates the PA pulling for NB-IoT HB band, while a divider-by-6 is designed for NB-IoT LB. With an 8-tap FIR filtering method, a wideband fractional-N PLL is designed without increasing the out-of-band phase noise. The proposed PLL consumes the maximum 4.7mW with 0.9V supply. Experimental results show that the PLL meets the phase noise and spur requirements of the NB-IoT/GNSS/BLE standards.
科研通智能强力驱动
Strongly Powered by AbleSci AI