神经形态工程学
记忆电阻器
计算机科学
控制重构
带宽(计算)
冯·诺依曼建筑
计算机体系结构
人工神经网络
可重组计算
高效能源利用
钥匙(锁)
电子工程
多路复用
传输(电信)
计算机硬件
非常规计算
嵌入式系统
突触重量
电子线路
现场可编程门阵列
尖峰神经网络
数码产品
理论(学习稳定性)
CMOS芯片
能量(信号处理)
作者
Guocheng Zhang,Zili Zeng,Yujie Yan,Jianchuan Tang,Hongyu Wang,Changqiang Su,Xin Yi,X. Zhang,Yuanyuan Hu,huipeng Chen
标识
DOI:10.1002/adfm.202531113
摘要
ABSTRACT Brain‐inspired neuromorphic computing holds the key to overcoming von Neumann bottlenecks and building intelligent computing systems due to its high energy efficiency and parallel processing capabilities. A significant challenge in the hardware implementation of neuromorphic computing is the separation of synaptic and neural components, which constrains integration density and energy efficiency. Although synaptic‐neuronal reconfiguration has been achieved in single memristors or transistors, it relies on compliance current or configuration ports, which suffer from crosstalk, delays, bandwidth bottlenecks owing to electrical signal properties, and increased complexity from additional control modules. This study proposes, for the first time, a UV‐regulated transparent memristor with reconfigurable synapse‐neuron functions. Its light‐controlled mechanism avoids electrical defects, eliminates crosstalk, and enables high‐speed, low‐power functional switching. The parallel transmission and spatial multiplexing characteristics of light not only achieve multi‐channel co‐regulation, improve integration density and bandwidth efficiency, but also integrate perception and computation. Furthermore, the transparency of the memristor confers greater advantages in stability and optoelectronic device fields. Leveraging its reconfigurable property, event‐driven spiking neural networks (SNNs) were implemented via 1S‐1N circuits and integrated with reinforcement learning algorithms to accomplish maze navigation (success rate >90%). This work provides a novel solution for the hardware implementation of neuromorphic computing networks.
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