低压差调节器
跌落电压
线性调节器
控制理论(社会学)
电压调节器
偏压
线路调节
电容器
调节器
负荷调节
低通滤波器
低压
电压
放大器
缓冲放大器
材料科学
滤波器(信号处理)
工程类
电子工程
电气工程
计算机科学
晶体管
化学
生物化学
控制(管理)
CMOS芯片
人工智能
基因
作者
Patel K.S Vasundhara,N. Kumar
标识
DOI:10.1142/s0218126623502080
摘要
This paper demonstrates a low power, frequency compensated with on-chip capacitor, low dropout linear voltage regulator. The proposed low dropout regulator (LDO) delivers a constant output voltage of 2.4V for an input range of 2.5–6.8V. A minimal drop of 2mV and 20mV was observed at no load and full load output current of 0 A to 100mA, respectively. LDO is realized by a high-gain two-stage error amplifier, internally compensated by passive a high-pass filter to achieve stability over a load current range of 0–100mA without occupying as much area as an active high-pass filter. The LDO presented requires a bias current of 10[Formula: see text]mA with a reference voltage of 1.5V and is designed in 180-nm technology.
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