Analysis and Mitigation Method of Inrush Current for Quasi-Two-Level Series-Connected SiC mosfets

Series-connected SiC MOSFETs is considered a promising approach for medium-voltage (MV) DC applications, providing an effective balance between cost and performance. In particular, based on quasi-two-level (Q2L) modulation strategy, the hybrid-clamping structure with indirect series connection is attractive due to its inherent voltage self-balancing capability, eliminating the need for additional voltage control loop. However, the issue that the switched-capacitor loop introduced for self-balancing can cause inrush current and additional turn-on switching loss in certain device has not been analyzed, which limits the potential of this topology. In this article, the switching process of the device within the switched-capacitor loop is first analyzed, clarifying the mechanisms behind the inrush current and additional losses. Then, an improved hybrid-clamping topology is proposed, which maintains the self-balancing capability while reducing inrush current and turn-on switching loss. In the end, 2000 V Double Pulse Tests (DPTs) demonstrate effective mitigation of inrush current to the level of the load current, along with an average 23% reduction in turn-on switching loss. Furthermore, continuous experiment validated the effectiveness of the proposed method.