Design of a Low Power Multi-Channel 10Bit SAR ADC

To meet the demand of low power multi-channel ADCs, a 10bit 4-channels SAR ADC using CSMC 0.35um 3.3V 2P4M technology was designed. By optimizing the power dissipation of the interior comparator and the interior DAC, the designed ADC costs only 300uW under 2V single supply with a sampling rate as high as 300KS/s. Meanwhile 1024 points FFT was used with MATLAB tools to analysis and calculate the converted results of the SAR ADC and the calculated results shown the SNR is about 60dB, ENOB is 9.6bit, DNL is 0.033LSB and the INL is 0.312LSB.