GaN Chiplet Technology Based on 300mm GaN-on-Silicon

We demonstrate for the first time a GaN chiplet technology based on 300mm GaN-on-silicon process. This GaN chiplet technology features: (a) industry’s thinnest GaN chiplet with an underlying silicon substrate that is only 19 µm thick, harvested from a fully-processed, thinned and singulated 300mm GaN-on-silicon wafer, and demonstrates outstanding transistor performance and figure-of-merits; (b) industry’s first library of fully functional integrated on-die CMOS digital circuits, from inverters, logic gates, multiplexers, and flip-flops to ring oscillators, using monolithically integrated GaN N-MOSHEMT and Si PMOS process; (c) promising results in TDDB, pBTI, HTRB and HCI studies indicating that the 300mm GaN MOSHEMT technology can meet required reliability metrics. The technology ingredients demonstrated in this work position the 300mm GaN-on-silicon technology as an attractive and capable chiplet technology for high-performance, high-density, efficient power and high-speed/RF electronics.