平行性(语法)
计算机科学
缓冲器(光纤)
并行计算
固态
国家(计算机科学)
电信
工程类
算法
工程物理
出处
期刊:IEICE Electronics Express
[Institute of Electronics, Information and Communication Engineers]
日期:2018-01-01
卷期号:15 (15): 20180419-20180419
被引量:8
标识
DOI:10.1587/elex.15.20180419
摘要
A problem with studies to utilize high-capacity RAM inside a SSD as buffer cache for NAND flash memory is their assumption that the NAND is a single chip, when current SSDs parallelise I/O requests through multiple NAND chips. Further, the studies focus on the buffer replacement policy, overlooking the more fundamental question of whether to use the buffer as read/write or write-only buffer. This paper compares the performance of the two buffer types in an SSD environment with internal parallelism using block I/O traces of representative servers and finds the followings. i) Even if the buffer replacement policy is the same, the average response time differs by up to 29.8% depending on the buffer type. Overall, the read/write buffer has a shorter average response time due to a higher buffer hit ratio. ii) However, despite a low buffer hit ratio, the average response time of read requests is reduced by up to 82.5% in the write-only buffer. This is because the read misses are handled bypassing the buffers in the write-only buffers, and thus there is no need to wait until the victim dirty buffer is flushed. iii) The response time is mainly determined by the waiting time, and the long waiting time occurs when evicting a dirty buffer. Therefore, when designing a buffer management policy, it should be considered to flush the tail dirty buffers in advance.
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