dBc公司
压控振荡器
频率合成器
相位噪声
CMOS芯片
锁相环
直接数字合成器
偏移量(计算机科学)
倍频器
炸薯条
材料科学
分频器
频率偏移
电气工程
电子工程
物理
电压
光电子学
工程类
计算机科学
正交频分复用
频道(广播)
程序设计语言
作者
Chun-Huat Heng,Bang‐Sup Song
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:2003-06-01
卷期号:38 (6): 848-854
被引量:84
标识
DOI:10.1109/jssc.2003.811872
摘要
A 1.8 GHz fractional-N frequency synthesizer implemented in 0.6 μm CMOS with an on-chip multiphase voltage-controlled oscillator (VCO) exhibits no spurs resulting from phase interpolation. The proposed architecture randomly selects output phases of a multiphase VCO for fractional frequency division to eliminate spurious tones. Measured phase noise at 1.715 GHz is lower than -80 dBc/Hz within a 20 kHz loop bandwidth and -118 dBc/Hz at 1 MHz offset with no fractional spurs above -70 dBc/Hz. The synthesizer has a frequency resolution step smaller than 10 Hz. The chip consumes 52 mW at 3.3 V and occupies 3.7 mm×2.9 mm.
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