Effect of passivation layer on back channel etching InGaZnO thin film transistors

钝化 薄膜晶体管 材料科学 无定形固体 阈值电压 场效应 氧化物薄膜晶体管 分析化学(期刊) 光电子学 晶体管 图层(电子) 电气工程 纳米技术 结晶学 化学 电压 工程类 色谱法
作者
Chen Wang,Pan Wen,Cong Peng,Meng Xu,Longlong Chen,Xifeng Li,Jianhua Zhang
出处
期刊:Chinese Physics [Science Press]
卷期号:72 (8): 087302-087302 被引量:3
标识
DOI:10.7498/aps.72.20222272
摘要

Amorphous indium gallium zinc oxide (IGZO) thin film transistors (TFT) are widely used in active-matrix displays because of their excellent stability, low off-current, high field-effect mobility, and good process compatibility. Among IGZO TFT device structures, back channel etching (BCE) is favorable due to low production cost, short channel length and small SD-to-gate capacitance. In this work, prepared are the BCE IGZO TFTs each with the passivation layer of silicon dioxide (SiO<sub>2</sub>), polyimide (PI) or SiO<sub>2</sub>-PI stacked structure to study their difference in back channel hydrogen impurity and diffusion behavior. Comparing with the conventional SiO<sub>2</sub> passivation BCE TFT, the performance of PI passivation TFT is improved greatly, specifically, the saturation field effect mobility increases from 4.7 to 22.4 cm<sup>2</sup>/(V·s), subthreshold swing decreases from 1.6 to 0.28 V/decade, and the an on-off current ratio rises dramatically from 1.1×10<sup>7</sup> to 1.5×10<sup>10</sup>. After the SiO<sub>2</sub> passivation layer is substituted with PI, the I<sub> off</sub> decreases from 10<sup>–11</sup> A to 10<sup>–14</sup> A, which indicates that there exist less shallow-level donor states of hydrogen impurities, which might be explained by the following three mechanisms: first, in the film formation process of PI, the direct incorporation of hydrogen-related radicals from SiH<sub>4</sub> precursor into the back channel is avoided; second, the hydrogen content in the PI film is lower and harder to diffuse into the back channel; third, the hydrogen impurity of back channel that is introduced by the H<sub>2</sub>O<sub>2</sub>-based etchant in the SD etching process could diffuse more easily toward the PI layer. The TFTs with PI passivation layer also shows the less electrical degradation after the annealing treatment at 380 ℃ and better output performance, which confirms less defects and higher quality of the back channel. The bias stabilities of PI devices are improved comprehensively, especially negative bias illumination stability with the threshold voltage shifting from –4.8 V to –0.7 V, which might be attributed to the disappearance of hydrogen interstitial sites and hydrogen vacancies that are charged positively in the back channel. The PI passivation layer is effective to avoid back channel hydrogen impurities of BCE TFT and promises to have broad applications in the display industry.
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