Nanopatterning Technologies of 2D Materials for Integrated Electronic and Optoelectronic Devices

Abstract With the reduction of feature size and increase of integration density, traditional 3D semiconductors are unable to meet the future requirements of chip integration. The current semiconductor fabrication technologies are approaching their physical limits based on Moore's law. 2D materials such as graphene, transitional metal dichalcogenides, etc., are of great promise for future memory, logic, and photonic devices due to their unique and excellent properties. To prompt 2D materials and devices from the laboratory research stage to the industrial integrated circuit‐level, it is necessary to develop advanced nanopatterning methods to obtain high‐quality, wafer‐scale, and patterned 2D products. Herein, the recent development of nanopatterning technologies, particularly toward realizing large‐scale practical application of 2D materials is reviewed. Based on the technological progress, the unique requirement and advances of the 2D integration process for logic, memory, and optoelectronic devices are further summarized. Finally, the opportunities and challenges of nanopatterning technologies of 2D materials for future integrated chip devices are prospected.