The Influence of Cu Microstructure on Thermal Budget in Hybrid Bonding

微观结构 材料科学 电子背散射衍射 模具(集成电路) 扫描电子显微镜 化学机械平面化 薄脆饼 互连 晶片键合 三维集成电路 抛光 复合材料 光电子学 冶金 集成电路 纳米技术 计算机科学 计算机网络
作者
Laura Mirkarimi,Cyprian Uzoh,Dominik Suwito,Bongsub Lee,G. G. Fountain,Thomas Workman,Jeremy Theil,Guilian Gao,Bryan Buckalew,Justin Oberst,Thomas Ponnuswamy
出处
期刊: 卷期号:: 162-167 被引量:40
标识
DOI:10.1109/ectc51906.2022.00036
摘要

Advanced package modules built with a hybrid bonding technology offer enhanced thermal performance, reliability, and scalability with the Cu-Cu interconnect. Direct Bond Interconnect (DBI®) Ultra technology is a die-to-wafer (D2W) or die-to-die (D2D) high volume manufacturing compatible process that offers handling die on tape, assembly at room temperature, and low temperature interconnect formation. Heterogeneous integration of sensors and processors manufactured at various technology nodes can be assembled to meet the requirement of the die with the lowest thermal budget in the module and obtain reliable, high performance all Cu-Cu interconnects.In this paper, we examine the influence of the Cu microstructure on the thermal budget required to obtain strong metallurgical CuCu bonds. Single die (8mmx12mm) stacks are bonded to a 300mm host wafer using the DBI Ultra process. The test structure includes ~35,000 Cu interconnects with a direct bond pad diameter of 10 um on a pitch of 40 um. The bonding pad microstructures included standard BEOL copper (STD), nano-twinned (NT) copper and fine-grain (FG) copper in this study. The three microstructures were obtained by engineering the electrodeposition process. The microstructure of each Cu type was characterized with scanning electron microscopy (SEM) electron back-scatter diffraction (EBSD) analysis. The die and host wafers were prepared carefully with chemical mechanical polishing to ensure that each Cu type and mating pad had the same topography. The bonding quality was characterized with C-mode scanning acoustic microscopy (CSAM) and cross-section SEM and EBSD.The samples were subjected to final anneal temperatures ranging from 150-270°C and varying annealing times. Strong metallurgical bonds were formed at temperatures as low as 180°C. Electrical resistance measurements of the full daisy chain and cross-sectional analyses were used to extrapolate the propensity for Cu-Cu interdiffusion and the quality of the final Cu-Cu interface. Results suggest that the microstructural differences can create a 20-40 degree reduction in the final anneal temperature. These studies indicate that microstructural engineering of the Cu pad may provide a path for further thermal budget reduction in electronic device assembly.
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