The principle of matched filter is introduced in this paper first.The algorithm of parallel matched filter is analyzed and the design method of parallel digital matched filter is presented.The parallel digital matched filter is simulated with Matlab,and the simulation result shows the designed filter is feasible.A sixteen-order high-speed parallel digital FIR filter based on the FPGA is implemented by using this new algorithm and the main point is analyzed.Finally,the performance test is implemented in this system,and the result indicates that the digital matched filter by adopting the parallel processing algorithm is suitable to high-speed signal processing.