材料科学
浅沟隔离
光电子学
薄脆饼
基质(水族馆)
氧化物
硅
电流(流体)
半导体器件
栅氧化层
沟槽
表征(材料科学)
分析化学(期刊)
电压
电气工程
纳米技术
化学
晶体管
图层(电子)
冶金
海洋学
地质学
工程类
色谱法
作者
Yandong He,Ganggang Zhang,Lin Han,Xing Zhang
标识
DOI:10.1109/led.2012.2208730
摘要
By measuring the substrate current under the forward bias of source/drain-substrate junction, a multiregion direct current current-voltage (MR-DCIV) technique is used to characterize the interface trap density and location in shallow-trench-isolation (STI)-based laterally diffused metal-oxide-semiconductor devices. The interface traps in LDMOSFETs yielded sharp well-resolved peaks in MR-DCIV current spectra. The interface traps in STI region can be measured without inducing any potential damages on the gate oxide by this nondestructive characterization tool. This technique can provide not only across-wafer as-grown interface trap profile but also stress-induced defect information.
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