Investigation on the Electrical–Thermal–Mechanical Performance of Multichip SiC Power Device With Cu-Clip Interconnect

Traditional packaging with bonded aluminum (Al) wires results in high parasitic inductance and reliability issues, therefore limiting the development of silicon carbide (SiC) power devices. A copper clip (Cu-clip) interconnection process has been proposed, which allows for better heat dissipation and thus enhances the power density of the device. While current research has primarily focused on its thermal performance and reliability, many issues remain unresolved. However, concentrated stress and electrical issues for multichip Cu-clip interconnects are still big challenges in the clip-bonded SiC MOSFET power device. Our work proposes an Arch clip with unloading groove (Arch-G) structure that can effectively reduce the stress of Cu-clip devices, demonstrating a 39.1% reduction compared with conventional planar clip devices. Compared with wire-bonded devices, the Arch-G clip device boasts lower conduction losses, and its parasitic inductance is reduced by 32.6%. Reliability via the power cycling test (PCT) of the Arch-G clip devices was also characterized experimentally. This work serves as a valuable reference for the design of high-performance Cu-clip power devices.