Tuning the interfacial properties of stacked gate dielectrics on silicon carbide by inserting h-BN layer

Silicon carbide (SiC) has significant potential for applications in high-voltage, high-temperature, and high-power devices, such as fast charging systems, grid-connected power systems, and switching power supplies. However, the performance of SiC-based metal–oxide–semiconductor field-effect-transistor devices is greatly limited by low channel mobility due to the high density of interface states at the SiO2/SiC interface. To address the issue of interface states, we have fabricated SiC-based metal–insulator–semiconductor capacitors featuring a stacked gate dielectric architecture (h-BN/Al2O3) and compared the effects of inserting h-BN thickness on the electrical properties of these capacitors. The insertion of a thin h-BN layer reduces the interface state density by more than two orders of magnitude compared to the structure with a single Al2O3 dielectric. Moreover, the stacked gate dielectric results in a notable reduction in the leakage current density from 5.19 × 10−2 to 3.78 × 10−9 A/cm2 at 4 MV/cm, accompanied by a reduction in the flatband voltage shift from 0.14 to 0.07 V. Such benefits originate from the improved band offset of 2.22 eV and the N atom passivation effect between the h-BN and SiC. These results present a practical solution for enhancing the performance of SiC/h-BN nanoelectronics, optoelectronics, and power electronics devices.