保险丝(电气)
CMOS芯片
电气工程
电子工程
电流(流体)
模式(计算机接口)
计算机科学
工程类
操作系统
作者
Philex Ming-Yan Fan,Chen-An Chen,Chih-Hao Wang,H S Ko
出处
期刊:IEEE Transactions on Circuits and Systems I-regular Papers
[Institute of Electrical and Electronics Engineers]
日期:2024-10-25
卷期号:72 (2): 685-693
标识
DOI:10.1109/tcsi.2024.3447276
摘要
The first 1.1V-programmable metal-fuse technology in 28nm CMOS technology is reported in this work. The prototyped 1Kb-memory array featuring a$12.4\mu $m2 1T1R bit cell adopts the proposed current-mode programming (CMP) scheme. The CMP scheme achieves a record low programming voltage of 1.1V, surpassing the programming voltages (≥1.6V) required by prior metal-fuse CMOS and FinFET technologies. To ensure successful programming, a closed-loop detector (CLD) employing an on-chip hysteresis comparator detects resistance transition in bit cells during programming. Preliminary experiments demonstrate that the proposed CMP scheme along with CLD achieves a 100% of yield after programming 960 bits at room temperature. Under various programming conditions, the combination of CMP and CLD demonstrates programming robustness, with resistance ratios before and after programming equal to and greater than three orders of magnitude. The measured results suggest a promising method for mitigating over-stress issues associated with high programming voltages used in prior art.
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