期刊:IEEE Transactions on Components, Packaging and Manufacturing Technology [Institute of Electrical and Electronics Engineers] 日期:2025-12-26卷期号:16 (8): 1754-1761
标识
DOI:10.1109/tcpmt.2025.3648743
摘要
In three-dimensional packaging architectures, the Through-Silicon Via-Redistributed Layer (TSV-RDL) interconnect structure serves as the critical conductive pathway and is continuously subjected to combined thermo-electric coupling loads, making it a vulnerable zone for electromigration failures. This research adopts a multidimensional methodology to analyze the influencing factors of electromigration in TSV-RDL. First, the study designs electromigration acceleration experiments based on the dual factors of temperature and current density to establish the time-varying resistance characteristic curves of the TSV-RDL. Second, scanning electron microscopy is employed to characterize the failure interfaces and to analyze the morphological differences between thermally dominant and electrically dominant failure modes. Finally, a thermal-electrical-mechanical multiphysics coupling model is constructed using the ANSYS Workbench platform. In conclusion, the study unequivocally demonstrates that the failure mechanisms in TSV-RDL structures are governed by two distinct regimes, dictated by the dominant driving force. The invariant locations of current crowding and stress concentration serve as inherent weaknesses of the structure. Crucially, the research establishes that the current-density-dominated regime leads to gradual, predictable degradation, whereas the temperature-dominated regime triggers rapid, catastrophic failure. These findings provide a critical foundation for designing reliable 3D integrations: by actively controlling the operational regime to favor current-density dominance, designers can significantly extend the interconnect lifespan. Furthermore, the identified failure hotspots offer precise targets for structural reinforcement and reliability monitoring.