In device overlay control with multiple overlay metrology in 3D-NAND process

As device dimensions continuously shrink in semiconductor manufacturing, even tighter overlay control is indispensable to secure good device yield. Using traditional optical overlay metrology via scribe-lane marks it is challenging to achieve good intra-field high-order process correction (iHOPC) due to the limited mark count and uneven mark distribution. Also the scribe-lane based metrology may not fully represent the in-device behavior in some cases. In order to achieve improved accuracy and precision of in-device overlay control, new metrology methodology solution is required. In this paper, three complementary overlay metrology techniques – high voltage scanning electron microscope (HV-SEM), optical scatterometry critical dimension measurement (SCD), and traditional scribe-lane based optical overlay metrology – were adopted for in-device overlay improvement. In 3D NAND device production, in-device overlay measurement is getting more challenging due to the thicker or complex film stack. Though both HV-SEM and SCD are able to measure in-device patterns via capturing buried structures, their different tool principles make them suitable in different situations. Through applying non-zero offset (NZO) overlay compensation at photo exposure, the in-device overlay performance can be enhanced by iHOPC, which is enabled by incorporating high-density in-device sampling measurements from HV-SEM and SCD into traditional optical scribe-lane optical overlay measurements. The improved overlay performance was demonstrated for different process layers in this study.