啁啾声
锁相环
电子工程
压控振荡器
带宽(计算)
相位噪声
频率调制
三角积分调变
物理
CMOS芯片
电气工程
工程类
电压
光学
电信
激光器
作者
Qixian Shi,Keigo Bunsen,Nereo Markulić,Jan Craninckx
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:2019-10-02
卷期号:54 (12): 3503-3512
被引量:36
标识
DOI:10.1109/jssc.2019.2941113
摘要
This article presents a 16-GHz frequency-modulated continuous-waveform (FMCW) modulator for radar applications in 28-nm CMOS. A two-point modulation technique is applied to reach a fast-chirp operation. A digital-to-time converter (DTC)-based subsampling phase-locked loop (PLL) is implemented to eliminate the power and noise from the frequency divider. Compared with the conventional delta-sigma division ratio-modulated PLL, this article presents an FM modulator with a finer loop-time resolution that lowers the quantization noise and improves the chirp FM accuracy. A voltage-driven analog varactor enables a programmable chirp bandwidth up to 1.5 GHz. The frequency-digital to analog converter (FDAC) nonlinearity is pre-distorted by an on-chip calibration engine. This FMCW modulator chirps 1.5-GHz bandwidth within 10 μs. The corresponding root-mean-square (rms) frequency error is 230 kHz, which is less than 0.015% of the chirp bandwidth.
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