材料科学
光电子学
成核
基质(水族馆)
薄脆饼
高电子迁移率晶体管
图层(电子)
晶体管
电子迁移率
电压
纳米技术
电气工程
工程类
地质学
有机化学
化学
海洋学
作者
Ya-Hsi Hwang,Tsung-Sheng Kang,F. Ren,S. J. Pearton
摘要
A through Si-substrate via-hole under the active area of GaN-based HEMTs grown on Si substrates is proposed to reduce the maximum junction temperature. Due to the large lattice mismatch between Si and GaN, an AlN nucleation layer and an AlGaN transition layer are required to grow GaN layers on Si substrates. This AlN nucleation layer is very defective and thermally resistive. The proposed through Si-substrate via-hole offers access to this AlN nucleation layer from the back side of the wafer. By removing this highly thermally resistive layer and plating the via hole with copper, the maximum junction temperature can be reduced from 146 to 120 °C at a power density of 5 W/mm. Besides reducing the maximum junction temperature of the HEMT, this through Si-substrate via-hole can be electrically connected to the source contact and act as a backside source field plate to reduce the maximum electric field around the gate edges and thereby increase the drain breakdown voltage. If this through Si-substrate via-hole is connected to the front gate pad, it can also behave as a back gate to improve front gate modulation.
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