Characterization of Threshold Voltage Shift in SiC MOSFETs Under Nanosecond-Range Switching and Its Impact on High- Frequency Applications

Dynamic threshold voltage shifts (DTVS) in silicon carbide (SiC) MOSFETs are investigated using an ultrafast characterization method that incorporates nanosecond-range switching. A positive gate bias causes a positive DTVS and a negative gate bias causes a negative DTVS, which is observed within a timescale range of 40 ns–1 s. At a gate bias of −10 V, the negative DTVS can reach approximately −4 V, which changes the threshold voltage from positive to negative. A mechanism involving carrier trapping at/near the SiO2 /SiC interface is proposed. Then, the impact of DTVS on dynamic behavior is evaluated by a double-pulse test (DPT) under different off-state gate biases ( ${V} _{\text {GS,OFF}}$ ). A negative DTVS causes the channel turn-on earlier, increasing the current overshoot ( ${I} _{\text {OS}}$ ) during the turn-on process. As ${V} _{\text {GS,OFF}}$ decreases from 0 to −10 V, the turn-on loss ( ${E} _{\text {ON}}$ ) increases by 11.2% at a load current of 10 A. Moreover, the ${E} _{\text {ON}}$ changes from an increase to a decrease when the turn-on gate resistance ( ${R} _{\text {G,ON}}$ ) increases from 10 to $50~\Omega $ . Therefore, for a specific gate driving condition, an optimized ${R} _{\text {G,ON}}$ can be chosen to compromise the DTVS-induced ${E} _{\text {ON}}$ change.