材料科学
电介质
光电子学
钝化
晶体管
氧化物
黑磷
栅极电介质
场效应晶体管
磷烯
栅氧化层
微电子
介电常数
纳米技术
高-κ电介质
柔性电子器件
蚀刻(微加工)
等效氧化层厚度
氧气
石墨
数码产品
降级(电信)
逻辑门
图层(电子)
作者
Jiajie Pei,Jiannan Lin,X Y Liu,Wenwei Chen,Han Zhang,Q Wang,Min Gao,Jingying Zheng,Hongbing Zhan,Haitao Zhang,Yuerui Lu
摘要
ABSTRACT Black phosphorus (BP) offers unique opportunities for next‐generation electronics owing to its high mobility, tunable bandgap, and anisotropic transport properties. However, the integration of high‐quality, high‐κ dielectrics while maintaining low‐defect interfaces to preserve its intrinsic properties remains a critical challenge that hinders its practical implementation. Here, we demonstrate that the oxide of BP (P x O y ) produced by oxygen plasma etching can serve as an ultrathin high‐κ dielectric material. Using dry‐transferred graphite as gate electrodes, we preserve the integrity of P x O y and achieve pristine interfaces. The resulting P x O y layer exhibits a relative permittivity of ∼21, an equivalent oxide thickness (EOT) of ∼1.7 nm, and a breakdown field of 3 MV cm − 1 . The BP/P x O y FETs fabricated under ambient conditions exhibited low‐voltage operation, balanced on/off ratios (>2 × 10 3 ), hole mobilities (>130 cm 2 V −1 s −1 ), and subthreshold swing values down to 64 mV dec −1 at room temperature. The devices show significantly improved stability, with no performance degradation after being placed in a vacuum for 16 days. Patterned oxidation enables integration into logic inverters and array devices, demonstrating compatibility with silicon‐based CMOS processes. This work establishes oxidized BP as a robust high‐κ dielectric and passivation layer, providing a superior interface and a scalable pathway for practical 2D nanoelectronics.
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