摘要
In recent years, there has been a big progress in artificial intelligence (AI) and high-performance computing (HPC), that have profoundly impacted the semiconductor industry. This progress has driven important innovations in hardware, particularly through the evolution of semiconductor manufacturing nodes, chiplet architectures, advanced packaging (AP), and high-speed interconnects. The continuous demand for higher computing power, improved performance, and enhanced system efficiency has boosted AP technology families, such as Fan-Out, Flip-Chip, and 2.5D/3D, beyond their traditional limitations in form factor, bandwidth, manufacturability, and cost.A critical challenge in this evolution lies in IC substrates, the foundational layer of advanced packages. The growing demands of AI workloads have directly influenced IC substrate development, necessitating improvements in line/space (L/S) scaling, larger form factors, mechanical stability, and the adoption of novel core materials. Among emerging solutions, glass core substrates (GCS) have gained attention as a promising alternative to conventional organic build-up substrates, offering many advantage such as superior dimensional stability, thermal conductivity, and electrical performance. These advantages, among others, enable finer interconnects and larger package sizes, which are critical for next-generation AI and HPC applications and can be also important for the Co-Packaged Optics (CPO). However, the transition to GCS introduces several manufacturing challenges. Key bottlenecks include Through-Glass Via (TGV) fabrication, and metallization. Additionally, challenges related to the coefficient of thermal expansion (CTE) mismatch, warpage, and large-area glass handling must be addressed to enable scalable production. The adoption of GCS also necessitates advancements in panel-level manufacturing equipment to accommodate the unique characteristics of glass substrates.This paper explores the ongoing efforts by IC substrate manufacturers, and their suppliers, to meet evolving industry requirements, the emergence of GCS as an promising technology, and the key bottlenecks that must be overcome for a wider adoption. As GCS gain traction, particularly for high-performance AI and HPC applications, their potential to enable next-generation chip-to-chip interconnects and high-density redistribution layers (RDLs) is increasingly evident.