磁阻随机存取存储器
计算机科学
德拉姆
嵌入式系统
计算机体系结构
并行计算
计算机硬件
随机存取存储器
作者
H D Kallinatha,Sadhana Rai,Basavaraj Talawar
出处
期刊:IEEE Access
[Institute of Electrical and Electronics Engineers]
日期:2024-01-01
卷期号:12: 7224-7243
被引量:9
标识
DOI:10.1109/access.2024.3352151
摘要
As the current primary memory technology is reaching its limits, it is essential to explore alternative memory technologies to accommodate modern applications and use cases. However, using new memory technology poses the challenge of deriving accurately estimated parameters for integrating new memory technology and doing reliable simulations. This study proposes a new approach incorporating Spin-Orbit-Torque-Magnetic-RAM (SOT-MRAM) into hybrid and full main memory architectures within a multi-core system, encompassing various memory configurations and capacities. The study addresses the challenge of evaluating SOT-MRAM-based memory systems when specific SOT-MRAM memory parameters are not publicly available. The research methodology includes micro-architectural (circuit-level) design space exploration and comprehensive full system simulations, which evaluate benchmark programs representing diverse application domains. The evaluation includes three memory structures with varying memory organizations and capacities. The results show that SOT-MRAM is a robust replacement for DRAM or hybrid memory, offering compelling advantages such as a remarkable 74.05% reduction in power consumption, a noteworthy 40.10% increase in bandwidth utilization, and a significant 72.85% reduction in Energy-Delay Product (EDP). The maximum latency penalties are also minimal, with a 3.71% increase for hybrid structures and a mere 0.07% for standalone SOT-MRAM memory structures.
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