A Ka-band Power Amplifier Improving OP1dB through Gain Expansion Achieving 28.1% PAE

A two-stage Ka-band power amplifier (PA) is designed in 65-nm CMOS process, in which the driver stage is biased in class-C region while the output stage is biased in class-AB region. The gain expansion of the driver stage is employed to cancel the gain compression of the output stage, and a 1.3dB increment of OP1dB is obtained. Moreover, the proposed PA achieves a high power-added efficiency (PAE) of 28.1% at the OP1dB.