耐久性
降级(电信)
电压
材料科学
压力(语言学)
高压
计算机科学
电子工程
电气工程
可靠性工程
光电子学
工程类
复合材料
语言学
哲学
作者
Peter L. Hacke,Kent M. Terwilliger,Ryan Smith,Stephen H. Glick,Joel W. Pankow,Michael Kempe,Sarah Kurtz Ian Bennett,Mario Kloos
出处
期刊:Conference record of the ... IEEE Photovoltaic Specialists Conference
[Institute of Electrical and Electronics Engineers]
日期:2011-06-01
卷期号:: 000814-000820
被引量:199
标识
DOI:10.1109/pvsc.2011.6186079
摘要
Over the past decade, degradation and power loss have been observed in PV modules resulting from the stress exerted by system voltage bias. This is due in part to qualification tests and standards that do not adequately evaluate for the durability of modules to the long-term effects of high voltage bias experienced in fielded arrays. High voltage can lead to module degradation by multiple mechanisms. The extent of the voltage bias degradation is linked to the leakage current or culombs passed from the silicon active layer through the encapsulant and glass to the grounded module frame, which can be experimentally determined; however, competing processes make the effect non-linear and history-dependent. Appropriate testing methods and stress levels are described that demonstrate module durability to system voltage potential-induced degradation (PID) mechanisms. This information, along with outdoor testing that is in progress, is used to estimate the acceleration factors needed to evaluate the durability of modules to system voltage stress. Na-rich precipitates are observed on the cell surface after stressing the module to induce PID in damp heat with negative bias applied to the active layer.
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