薄膜晶体管
材料科学
晶体管
光电子学
非晶硅
阈下斜率
薄脆饼
硅
无定形固体
阈值电压
蚀刻(微加工)
氧化物薄膜晶体管
电介质
薄膜
频道(广播)
电气工程
电压
纳米技术
晶体硅
图层(电子)
结晶学
化学
工程类
作者
Isaac Chan,Arokia Nathan
摘要
This letter reports 100nm channel length vertical thin-film transistors (VTFTs) in hydrogenated amorphous silicon (a-Si:H) technology. The channel length is defined by means of a dielectric film thickness, realized by an anisotropic reactive ion etching process to yield a 90° vertical transistor structure. Furthermore, the device area of the vertical TFT structure is less than ∼1∕3 that of the ubiquitous lateral TFT structure. The 100nm channel length VTFTs exhibit an ON/OFF current ratio of 108, a threshold voltage of 2.8V, and a subthreshold slope of 0.8V∕dec.
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