沟槽
护盾
功勋
材料科学
MOSFET
光电子学
限制
电场
电气工程
晶体管
工程类
纳米技术
物理
图层(电子)
地质学
机械工程
电压
岩石学
量子力学
作者
Wenrong Cui,Jianbin Guo,Hang Xu,David Wei Zhang
出处
期刊:Micromachines
[Multidisciplinary Digital Publishing Institute]
日期:2025-04-10
卷期号:16 (4): 447-447
摘要
In this study, we propose an optimized shield gate trench 4H-SiC structure with effective gate oxide protection. The proposed device has a split trench with a P+ shield region, and the P+ shield is grounded by the middle deep trench. Our simulation results show that the peak electric field near the gate oxide is almost completely suppressed. Compared with a conventional P+ shield device, our proposed structure achieves a 78% reduction in the Qgd and a 108% increase in the FoM (figure of merit) simultaneously. Additionally, it is estimated that the device cell pitch can be reduced to 1.8 μm with a Ron below 0.94 mΩ·cm2, in theory. These demonstrated device performance metrics, as well as its simple structure and good compatibility, make our proposed SiC MOSFET highly attractive for future high-performance applications.
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