CMOS芯片
摩尔定律
缩放比例
计算机科学
晶体管
消亡
电子线路
集成电路
标度律
电气工程
电子工程
计算机体系结构
工程类
电压
几何学
数学
法学
政治学
操作系统
出处
期刊:IEEE Micro
[Institute of Electrical and Electronics Engineers]
日期:2017-11-01
卷期号:37 (6): 20-29
被引量:280
标识
DOI:10.1109/mm.2017.4241347
摘要
Scaling transistors and following Moore's law have served the industry well for more than 50 years in providing integrated circuits that are denser, cheaper, higher performance, and lower power. And despite occasional reports of its demise, Moore's law is alive and well. But progress in scaling CMOS has not come easily. We've had to continually invent and introduce new materials and new device structures to deliver the performance, power, and cost improvements expected of each new technology generation. This article describes trends in CMOS scaling over the past decade and discusses some of the new device options and technology directions being explored to continue scaling into the future.
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