A Dual-Loop LDO with Voltage-Controlled Oscillator Based Control

A voltage-controlled oscillator based low-dropout regulator with dual loops is proposed. The fine-tuning loop processes signals in the time domain using voltage-controlled oscillators and a frequency comparator, achieving precise voltage regulation. The coarse-tuning loop utilizes continuous-time comparators, ensures fast transient response. This LDO is designed and simulated based on the $0.18-\mu \mathrm{m}$ CMOS process. The simulation results demonstrate that the LDO can maintain a 1 V output voltage with a maximum load current of 50 mA when the input voltage ranges from 1.2 V to 2 V. When a load current steps from 1 mA to 11 mA within 15 ns, the drop voltage and settle time are 127 mV and $0.1 \mu \mathrm{s}$, respectively.