(Invited) Low Energy Methods for Highly Selective Etching and Surface Treatment of Advanced Nanodevices

In the pursuit of higher performance semiconductors, device length scales continue to shrink down to nanometer dimensions with emerging chip designs increasingly dependent on 3D structures to maintain scaling. Memory manufacturers have already deployed 3D NAND devices with ongoing development for 3D DRAM devices. Advanced logic manufacturers have already deployed 3D FinFET devices and are beginning to deploy more complex GAA (Gate-All-Around) 3D devices as well. Building 3D structures has increased the need for more sophisticated selective etching. As these selective etches have become critical to the formation of the device, atomic precision material loss is required with low contrast materials. We review several materials systems where insufficient selectivity control in plasma-based radical etch necessitates innovative approaches such as atomic layer passivation, low energy metastable activated radicals and plasma-less low energy thermal chemical etching. Dummy polysilicon removal requires full removal of the polysilicon with minimal film loss to dielectric films such as silicon oxide and silicon nitride. While polysilicon can be removed by either wet etch or dry etch, each approach has certain limitations that narrow the overall process window. Wet etch chemistries such as TMAH (tetramethyl ammonium hydroxide) anisotropically etch polysilicon preferentially along crystalline planes which can result in silicon residues at the bottom corners of trenches. Highly isotropic dry etch radical chemistries minimize silicon residues but have greater tendency to damage the underlying epitaxial silicon layer due to either excessive film loss or halogen radical penetration through the encapsulating film. We show that the introduction of atomic layer passivation modifies the top monolayer of an oxide encapsulation layer and consequently widens the epi damage-free window. Selective mask removal requires full removal of the organic mask with high selectivity to exposed epitaxial silicon surfaces. While plasma-generated radicals have been effectively used for some time, it has become increasingly difficult for both advanced FinFET and GAA devices as the epi film loss requirements lower to a single atomic layer. We propose the tail energy distribution of reactive species formed in the plasma region is the driving factor for epitaxial film loss. To reduce these effects, we apply MARS (Metastable Activated Radical Source) technology where reactive species are indirectly formed outside the plasma region though collisions with metastable intermediates. The result is a significant reduction in higher energy species flux to the surface corresponding to a lower epi loss than conventional radical approaches. GAA device integration relies on depositing and subsequently removing SiGe layers to form Si-nanowires or nanosheets. Fluorine radical-based chemistries have limited selectivity to silicon because the bond strength difference between Si-Si and Si-Ge is exceedingly narrow and about 0.3 eV. We show a thermal chemical etching approach that achieves substantially higher SiGe:Si selectivity than radical etching on both blanket films and test structures. In addition, we highlight the strict film loss requirements that require highly selective native oxide removal prior to removing SiGe layers. We describe a thermal chemical etching approach that applies wet etch mechanisms in a vacuum environment to achieve high selectivity to both silicon and silicon nitride.