放大器
低噪声放大器
噪声系数
平坦度(宇宙学)
有效输入噪声温度
电气工程
直接耦合放大器
电子工程
全差分放大器
线性
仪表放大器
级联放大器
射频功率放大器
物理
工程类
运算放大器
CMOS芯片
量子力学
宇宙学
作者
Zhao Wang,Zeyu Zhao,Yang Lu,Lin Yang,Chupeng Yi,Ting Feng,Xiaotao Liu
标识
DOI:10.1109/sslchinaifws60785.2023.10399739
摘要
In this paper, an 8∼12 GHz low power and low noise amplifier based on 0.15 μm GaAs pHEMT process is introduced. The two-stage amplifier is composed of two common source transistor cascades. The pre-stage amplifier mainly realizes minimum noise matching, and the post-stage amplifier mainly realizes power gain matching, and the RLC negative feedback network is added to effectively improve the small-signal gain flatness. Based on self-bias technology and current multiplexing method, the amplifier can improve the gain while greatly reducing the power consumption. EM simulation results show that in the 8∼12 GHz frequency band, the gain of the amplifier is better than 20 dB, the gain flatness is ±0.3 dB, the return loss of the input and output is better than 12 dB and 15 dB respectively, the typical noise coefficient in the band is 1.05 dB, the DC power consumption is only 65mW, and the chip size is 1.4 × 1.2 mm 2 . The chip has excellent low noise performance and high linearity characteristics with low power consumption and small size, which is suitable for satellite communication and radar applications. At the same time, the RF performance before and after adding RLC negative feedback network and the change of chip noise coefficient under different bias are investigated. The results show that the gain flatness can be significantly improved after adding RLC negative feedback network, and the input reflection is slightly deteriorated. In the range of 2.5-5 V bias voltage, the typical noise coefficient of the chip is less than 1.12 dB in the frequency band, and it has good stability.
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