Binary field multiplication on ARMv8

Abstract In this paper, we show efficient implementations of binary field multiplication over ARMv8. We exploit an advanced 64‐bit polynomial multiplication ( PMULL ) supported by ARMv8 and conduct multiple levels of asymptotically faster Karatsuba multiplication for polynomial multiplication. Finally, our method completed binary field multiplication within 57 and 153 clock cycles for B‐251 and B‐571 cases, respectively. Proposed method improves the speed‐performance by a factor of 4.5 times than previous techniques on same target platform. Copyright © 2016 John Wiley & Sons, Ltd.