Electronic-Photonic Co-Optimization of Linear Drive Laser-Forwarded Coherent Silicon Photonic Transmitters for Co-Packaged Optical (CPO) Links

光子学 硅光子学 材料科学 光电子学 光子集成电路 硅 激光器 混合硅激光器 光开关 光学 物理
作者
Antroy Roy Chowdhury,Wahid Rahman,Vladimir Stojanović
出处
期刊:Journal of Lightwave Technology [Institute of Electrical and Electronics Engineers]
卷期号:43 (9): 4338-4351 被引量:3
标识
DOI:10.1109/jlt.2025.3532994
摘要

As data center performance scales rapidly with the highest-ever growth in network traffic, co-packaged optics (CPO) proves to be a potential solution for realizing high bandwidth density and energy-efficient interconnects within data centers. Coherent electro-optic transceivers in O-band are gaining much attention for scaling the bandwidth density of CPO interfaces. Co-design and co-optimization of these transceivers, while incorporating bandwidth limitations and link equalization capabilities, play a vital role in designing truly optimized energy-efficient systems. In most electro-optic transceivers, the overall power consumption is often dominated by the transmitter side, including the laser source. In this work, we first propose a modelling framework based on closed-form expressions for both the optical and electrical data path of a coherent transmitter. The modelling framework incorporates different link constraints such as data rate, input electrical swing, etc. Different technology constraints such as electrical and optical device parameters are also considered. Using this modelling framework, we propose a bandwidth-aware co-optimization scheme to optimize the overall energy-efficiency of the transmitter including the laser source. The co-optimization scheme assumes PAM4 electrical data and it leverages the coherent transmitter pulse-response to incorporate transmitter bandwidth limitations and host SerDes equalization capabilities. For 224 Gb/s QAM-16 operation, an optimized unequalized linear-drive transmitter is projected to reach an energy-efficiency of 2 pJ/bit including the laser power consumption. Energy-efficiency can be reduced down to 1.4 pJ/bit with a 1-tap TX feed-forward equalization (FFE) and to 1.2 pJ/bit with a 1-tap decision-feedback equalization (DFE) in the host SerDes.
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