材料科学
同质结
逻辑门
光电子学
与非门
电子线路
非易失性存储器
计算机科学
电气工程
纳米技术
电子工程
工程类
异质结
作者
A. Raghu Ram,Krishna Prasad Maity,Cédric Marchand,Aymen Mahmoudi,Aseem Rajan Kshirsagar,Mohamed A. Soliman,Takashi Taniguchi,Kenji Watanabe,B. Doudin,Abdelkarim Ouerghi,Sven Reichardt,Ian O’Connor,Jean‐François Dayen
出处
期刊:ACS Nano
[American Chemical Society]
日期:2023-10-21
卷期号:17 (21): 21865-21877
被引量:4
标识
DOI:10.1021/acsnano.3c07952
摘要
Emerging reconfigurable devices are fast gaining popularity in the search for next-generation computing hardware, while ferroelectric engineering of the doping state in semiconductor materials has the potential to offer alternatives to traditional von-Neumann architecture. In this work, we combine these concepts and demonstrate the suitability of reconfigurable ferroelectric field-effect transistors (Re-FeFETs) for designing nonvolatile reconfigurable logic-in-memory circuits with multifunctional capabilities. Modulation of the energy landscape within a homojunction of a 2D tungsten diselenide (WSe2) layer is achieved by independently controlling two split-gate electrodes made of a ferroelectric 2D copper indium thiophosphate (CuInP2S6) layer. Controlling the state encoded in the program gate enables switching between p, n, and ambipolar FeFET operating modes. The transistors exhibit on-off ratios exceeding 106 and hysteresis windows of up to 10 V width. The homojunction can change from Ohmic-like to diode behavior with a large rectification ratio of 104. When programmed in the diode mode, the large built-in p-n junction electric field enables efficient separation of photogenerated carriers, making the device attractive for energy-harvesting applications. The implementation of the Re-FeFET for reconfigurable logic functions shows how a circuit can be reconfigured to emulate either polymorphic ferroelectric NAND/AND logic-in-memory or electronic XNOR logic with a long retention time exceeding 104 s. We also illustrate how a circuit design made of just two Re-FeFETs exhibits high logic expressivity with reconfigurability at runtime to implement several key nonvolatile 2-input logic functions. Moreover, the Re-FeFET circuit demonstrates high compactness, with an up to 80% reduction in transistor count compared to standard CMOS design. The 2D van de Waals Re-FeFET devices therefore exhibit promising potential for both More-than-Moore and beyond-Moore future of electronics, in particular for an energy-efficient implementation of in-memory computing and machine learning hardware, due to their multifunctionality and design compactness.
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