The carrier mobility of MoS 2 transistors can be greatly improved by the screening effect of high-k gate dielectric. Therefore, in this paper, atomic layer deposited HfTiO annealed in different ambients (N 2 , O 2 , and NH 3) is used to replace SiO 2 as gate dielectric for fabricating back-gated multilayer MoS 2 transistors. As a result, excellent electrical properties are achieved for the sample annealed in NH 3 at 400 °C for 10 min: the field-effect mobility of 31.1 cm $^{\mathrm {\mathbf {2}}}$ /(V $\cdot $ s) and the subthreshold swing of 100 mV/decade, which are six times higher and three times smaller compared with that of the control sample, respectively. The enhanced electrical performance should be associated with the passivation effects of the NH 3 annealing, which reduces defective states in the HfTiO dielectric and at/near the HfTiO/MoS 2 interface. The capacitance equivalent thickness of the gate dielectric (HfTiO) is only 6.79 nm, which is quite small for back-gated MoS 2 transistor and is conducive to the scaling down of the device.