Novel Equivalent Simulation Method and Experimental Zero Failure Verification of Optimized 650V SJ MOSFETs Under 100% Rated Voltage HTRB

In this work, the reliability issues of automotive-grade super junction MOSFETs (SJ MOSFETs) under 100% rated voltage high temperature reverse bias (HTRB) stress are investigated. While conventional devices pass the standard 80% rated voltage test, they exhibit random cell burnout failures under 100% stress. To address this, a novel equivalent HTRB (EQ-HTRB) TCAD simulation method is proposed, which successfully reproduces the failure mechanism and reveals the dynamic electric field shift towards the substrate, induced by high internal leakage current, is the root cause. Based on the buffer layer electric field modulation mechanism derived from the proposed simulation method, a multi-layer buffer structure with a smooth doping transition is designed to suppress the electric field shift. Experimental results demonstrate that the optimized device achieves a 0% failure rate (0/45) after 1000 hours of HTRB stress at 100% rated voltage (VDS= 650 V, T = 150 °C). Furthermore, critical parameters, including threshold voltage (Vth), on-resistance (Ron), and breakdown voltage (BVDSS), show negligible degradation after the stress test, verifying the robustness of the proposed structure.