Scalable High-Voltage Pass Transistor Strustures: Physical-based and Variation-Aware Evaluation Toward 1000 Layer 3D NAND Flash

As 3D NAND flash continues to advance beyond 1000 word-line (WL) layers, high-voltage (HV) pass transistor for WL driver circuit emerges as a key bottleneck for NAND chip scaling due to layout overhead and reliability degradation in scaled planar HV pass transistor. Here, we present a structure-aware physical analysis of four HV pass transistor structures: planar, recessed source/drain (RSD), buried channel array transistor (BCAT), and FinFET. Among them, FinFET shows superior gate controllability, body effect immunity and geometric variation tolerance. A machine-learning-assisted cell $V_{\text{th }}$ prediction framework confirms the advantage of FinFET, showing efficient program (PGM) transfer with a minimum number of PGM loops and low power consumption during ISPP operation. These results highlight FinFET as a promising candidate for a reliable and scalable HV pass transistor in 3D NAND flash.