薄脆饼
材料科学
基质(水族馆)
硅
破损
研磨
抵抗
复合材料
导电体
光电子学
海洋学
图层(电子)
地质学
作者
Malcolm Grief,Julian A. Steele
标识
DOI:10.1109/iemt.1996.559727
摘要
Demand for die produced on ultra thin silicon substrates requires improvement in wafer thinning capability, manufacturing equipment substrate handling and packing methodologies. Existing methods typically consider substrates that are nominally flat and relatively thick (254 /spl mu/m to 613 /spl mu/m). The challenge COM 1 faces on several of its product lines, is that they require that the 150 mm diameter substrate be thinned to below 150 /spl mu/m. Wafers at this thickness will tend to bow and warp with unpredictable orientation. This is due to the interaction between stresses from the various frontside and backside dielectric and conductive layers together with those induced by the backside grinding and chemical thinning and the reduced ability of the thin silicon substrate to resist these forces. Existing schemes used for smaller wafer diameters (<100 mm) have proven incapable of successfully thinning, handling and transferring these larger substrates to the assembly sites, resulting in high levels of wafer breakage. To enhance survivability during subsequent handling and shipment of ultra-thin 150 mm wafers, the understanding of warpage and die strength becomes critical, which is the focus of this paper.
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